The present invention relates generally to phase-locked loop motor speed control system, and in particular to a fine adjustment speed control circuit for such systems.
Phase-locked loop systems are well known in the art and proved useful for controlling the speed of a motor of the high precision type such as turntable drive motors and those used in tape recorders. Japanese Patent laid-open applications 51-104515 and 52-101408 disclose such phase-locked loop motor speed control systems using crystal-controlled stabilized frequency source as a standard motor drive signal and a frequency divider or multiplier for varying the oscillator frequency to a suitable value.
Although the standard frequency is stabilized, the phase-controlled motor speed is not always what one would expect and fine adjustment speed control is often desired. This may be accomplished by varying the frequency of the standard motor drive signal with the use of a programmable frequency divider coupled to the crystal-controlled oscillator. However, this involves a large number of program steps in the programmable frequency divider or counter, tending the system to become considerably complicated with a consequential increase in cost.